建立了芯片尺寸封装（Chip Scale Package，CSP）焊点有限元分析模型和电磁仿真模型，选取焊点直径、焊点高度和焊盘直径作为设计变量，以CSP焊点随机振动应力和回波损耗为目标值，设计17组焊点形态参数水平组合并建模进行仿真计算，采用响应曲面法对17组组合应力值、回波损耗值与CSP焊点形态参数间关系进行拟合，结合遗传算法对拟合函数进行优化设计，得到CSP焊点随机振动应力值和回波损耗值同时降低参数水平组合，并通过回波损耗测试实验对优化结果进行了验证。结果表明：优化后CSP焊点最大等效应力下降11%的同时回波损耗降低了2.78%，回波损耗实测试验验证了优化结果的正确性。
Abstract
The finite element analysis model and the electromagnetic simulation one for chip size package (CSP) solder joint were established.Choosing solder joint diameter, its height and welding pad diameter as design variables, taking CSP solder joint’s random vibration stress and return loss as objectives, 17 sets of solder joint morphological parametric level combinations were designed and modeled to do simulation computation.The response surface (RS) method was used to fit relations among 17 combination sets’ stress values, return loss values and CSP solder joint morphological parameters.The genetic algorithm (GA) was used to do optimization design for fitted functions to obtain CSP solder joint’s optimal random vibration stress values and return loss ones, and reduce its parametric level combination.The optimization results were validated with return loss measurement tests.The results showed that after optimization, the maximum equivalent stress of CSP solder joint drops by 11% while its return loss reduces by 2.78%; the actual measurement tests of return loss verify the correctness of the optimization results.
关键词
芯片尺寸封装 /
随机振动 /
回波损耗 /
响应面 /
遗传算法
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Key words
Chip size package /
random vibration /
return loss /
response surface /
genetic algorithm;
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